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A list of all the posts and pages found on the site. For you robots out there, there is an XML version available for digesting as well.

Pages

Posts

Future Blog Post

less than 1 minute read

Published:

This post will show up by default. To disable scheduling of future posts, edit config.yml and set future: false.

Blog Post number 4

less than 1 minute read

Published:

This is a sample blog post. Lorem ipsum I can’t remember the rest of lorem ipsum and don’t have an internet connection right now. Testing testing testing this blog post. Blog posts are cool.

Blog Post number 3

less than 1 minute read

Published:

This is a sample blog post. Lorem ipsum I can’t remember the rest of lorem ipsum and don’t have an internet connection right now. Testing testing testing this blog post. Blog posts are cool.

Blog Post number 2

less than 1 minute read

Published:

This is a sample blog post. Lorem ipsum I can’t remember the rest of lorem ipsum and don’t have an internet connection right now. Testing testing testing this blog post. Blog posts are cool.

Blog Post number 1

less than 1 minute read

Published:

This is a sample blog post. Lorem ipsum I can’t remember the rest of lorem ipsum and don’t have an internet connection right now. Testing testing testing this blog post. Blog posts are cool.

portfolio

publications

A Coupled Oscillator Based Ising Chip with a Fully-Connected Annealing Core, A Hamiltonian Engine, and a RISC-V Gradient Search for Solving 2,500+ Spin Combinatorial Optimization Problems

Published in IEEE European Solid-State Electronics Research Conference (ESSERC), 2025

A silicon Ising chip featuring a fully-connected annealing core, an on-chip Hamiltonian engine, and an integrated RISC-V processor for gradient-guided search, enabling solution of combinatorial optimization problems with 2,500+ spins.

Extractive Summarization on a CMOS Ising Machine

Published in IEEE Access, vol. 14, 2026

Demonstrates that extractive text summarization can be formulated as a QUBO instance and solved on a CMOS Ising machine, showcasing a practical NLP application for physics-based computing hardware.

Neura: A Unified Framework for Hierarchical and Adaptive CGRAs

Published in ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2026

A unified compilation and architecture framework for coarse-grained reconfigurable arrays (CGRAs) that introduces hierarchical spatio-temporal scheduling to improve tile utilization and performance portability.

SATIC: An Optimizing Ising Compiler for SAT(isfiability)

Published in ACM/IEEE International Symposium on Computer Architecture (ISCA), 2026

An optimizing compiler that maps SAT instances onto Ising hardware, enabling physics-based Ising machines to tackle satisfiability problems at scale.

On the Limits of Ising Machines for Circuit-Derived SAT

Published in IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2026

A study of how well Ising machines handle structured, circuit-derived SAT instances, identifying where physics-based solvers hit their limits on these workloads.

talks

teaching

Teaching experience 1

Undergraduate course, University 1, Department, 2014

This is a description of a teaching experience. You can use markdown like any other post.

Teaching experience 2

Workshop, University 1, Department, 2015

This is a description of a teaching experience. You can use markdown like any other post.